The invention disclosed herein relates generally to a method and means for detecting the states of capacitive sensing devices such as key actuated variable capacitors, and more particularly to a method and circuitry for reliably determining the states of variable capacitors in a plurality of such capacitors in which the capacitance change of any capacitor may be masked by the effective shunt capacitance of the other capacitors and other circuit elements.
Electronic keyboards have long comprised a primary form of input device for information handling and data processing systems. Capacitive keyboards are well known in the field of data input devices. They provide certain inherent advantages over electrical contact keyboards. These advantages particularly include mechanical simplicity, long life and absence of electrical signal problems caused by contact bounce and corrosion.
In order to reduce the cost and complexity of detection circuitry used with capacitive keyboards and in order to reduce the number of conductors necessary to connect such keyboards with external detection circuitry, it is known to provide for sequential scanning of the key actuated capacitors to determine key status. This may be accomplished by means of a matrix of row and column conductors, each key actuated capacitor being connected between a unique pair of conductors comprising one row and one column conductor. A drive signal may be sequentially impressed on conductors in one set of conductors while the conductors in the other set are sequentially addressed to detect signals coupled thereto.
However, as set forth in numerous publications, including U.S. Pat. No. 3,750,113 issued to J. Cencel on July 31, 1973, scanned capacitive keyboards suffer from another problem which is particularly significant in capacitively coupled systems. This problem stems from the fact that there is inherent capacitive coupling between every pair of elements in a keyboard. Thus, in a typical capacitive keyboard having a matrix of conductors including drive signal and sense signal conductors, a signal on any conductor will normally appear to some extent on every other conductor. Obviously, this phenomenon complicates the task of detecting which of an array of variable capacitors between pairs of conductors in the matrix is actuated.
As noted in the above identified patent, a variety of techniques have been employed in attempts to minimize problems caused by stray capacitive coupling. These techniques include the use of ground lines interleaved between the drive and/or sense conductors, ground planes and various forms of shielding. In addition, various electronic signal detection, verification and processing techniques have been employed to improve the reliability of detecting and distinguishing valid key actuation signals from signals caused by stray coupling. Some representative techniques are disclosed in U.S. Pat. Nos. 3,931,610 issued to R. Marin, et al on Jan. 6, 1976, 4,163,222 issued to D. Gove on July 31, 1979, and 4,211,915 issued to D. Miller, et al on July 8, 1980.
It is also known to maintain a reference potential on all conductors except for individual conductors while they are being addressed to effectively eliminate cross talk and interference in a capacitive keyboard in which an array of capacitors is sequentially scanned. This technique is shown in Katz, et al, "A MOS LSI Capacitive Keyboard Interface Chip", IEEE Journal of Solid-State Circuits, Vol. SC13, No. 5, pages 561-565, (October 1978), and U.S. Pat. No. 4,405,917 issued to T. Chai on Sept. 20, 1983.
The foregoing techniques are useful in reducing the effects of unintentional capacitive coupling through elements other than capacitors in a single row or column. However, a problem continues to exist in detecting a valid key actuation where the key is one of a plurality of actuated keys in the same row or column, as might occur if a key is actuated before previously actuated keys are released. More specifically, the capacitors associated with keys other than the key being addressed act as shunt capacitors between the sense conductor and ground or other reference potential. The change in voltage on the sense conductor due to actuation of a key is equal to the drive voltage times the capacitance of the capacitor associated with the key divided by the sum of the shunt capacitance and the key associated capacitance. If a number of keys other than the key of interest are actuated or a large shunt capacitance is otherwise present, the change in sensed voltage becomes small. This phenomenon is noted in previously identified U.S. Pat. No. 3,750,113 in which an amplifier configured for substantially unity gain, thus operating in a current amplifier mode, is employed to reduce the difficulties in correctly detecting key actuation.
The sensed voltage is typically compared with a fixed threshold reference to determine whether there is sufficient change to indicate actuation of a key. U.S. Pat. Nos. 4,175,239 issued to L. Sandler on Nov. 20, 1979 and 4,266,144 issued to R. Bristol on May 5, 1981 illustrate representative capacitive apparatus in which sensed voltages are compared with constant threshold or reference voltages. As the change in sensed voltage becomes small due to the simultaneous actuation of an increasing number of keys, reliable detection of key actuations becomes increasingy difficult. Techniques for overcoming this problem include increasing the drive voltage and/or maintaining tighter control over parasitic capacitances. Increasing the drive voltage is undesirable because it leads to increased power consumption and increased manufacturing costs. In general, any requirement to maintain tighter control over parasitic capacitances also results in increased manufacturing costs, and is therefore undesirable.
The present invention minimizes or avoids many of the foregoing difficulties by effectively establishing an adaptive reference against which key state dependent signals are sensed. Accordingly, key state is determined essentially from the polarity of the sensed signal. The adaptive feature permits relaxed requirements regarding parasitic capacitances which provide for cost reductions. In addition, circuitry for carrying out the present invention is well suited for fabrication with standard CMOS integrated circuit designs which provide for low power consumption and low cost.